New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 41 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0108-cpu-amd-model_10xxx-Set-up-cache-controls-on-Family-.patch b/resources/libreboot/patch/kgpe-d16/0108-cpu-amd-model_10xxx-Set-up-cache-controls-on-Family-.patch
new file mode 100644
index 0000000..7720666
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0108-cpu-amd-model_10xxx-Set-up-cache-controls-on-Family-.patch
@@ -0,0 +1,41 @@
+From 6b299238948c1cdde372472e3854a79eb6233564 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Sat, 8 Aug 2015 20:31:03 -0500
+Subject: [PATCH 108/146] cpu/amd/model_10xxx: Set up cache controls on Family
+ 15h to improve performance
+
+---
+ src/cpu/amd/model_10xxx/defaults.h |   10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
+index 5ab4335..ce25b25 100644
+--- a/src/cpu/amd/model_10xxx/defaults.h
++++ b/src/cpu/amd/model_10xxx/defaults.h
+@@ -139,8 +139,9 @@ static const struct {
+ 	  0x00000000, 1 << (42-32)},	/* Bx [PwcDisableWalkerSharing]=1 */
+ 
+ 	{ BU_CFG3, AMD_OR_C0, AMD_PTYPE_ALL,
+-	  1 << 22, 0x00000000,
+-	  1 << 22, 0x00000000},		/* C0 or above [PfcDoubleStride]=1 */
++	  (0x3 << 20) | (0x1 << 22), 0x00000000,
++	  (0x3 << 20) | (0x1 << 22), 0x00000000},	/* C0 or above [PfcDoubleStride]=1,
++	  						   PfcStrideMul]=0x3 */
+ 
+ 	{ EX_CFG, AMD_OR_C0, AMD_PTYPE_ALL,
+ 	  0x00000000, 1 << (54-32),
+@@ -646,6 +647,11 @@ static const struct {
+ 	 * System software should set F5x88[14] to 1b. */
+ 	{ 5, 0x88, AMD_OR_B2, AMD_PTYPE_ALL,
+ 	  1 << 14, 1 << 14 },
++
++	/* L3 Control 2 */
++	{ 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++	  0x00000090, 0x000001d0 },	/* ImplRdProjDelayThresh = 0x2,
++					   ImplRdAnySubUnavail = 0x1 */
+ };
+ 
+ 
+-- 
+1.7.9.5
+