diff options
| author | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 19:12:53 (EDT) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 21:32:36 (EDT) |
| commit | 0622df6194dbb1b2120743c0fd1cc5e72c380128 (patch) | |
| tree | 4c858b8c5667fe001a9907ae0578b4ec28a8f513 /resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch | |
| parent | 5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (diff) | |
| download | libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.zip libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.gz libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.bz2 | |
KGPE-D16: update patch set (also update coreboot and vboot)
Also contains other fixes from coreboot, like:
* 551cff0 Derive lvds_dual_channel from EDID timings.
^ makes single/dual channel LVDS selection on GM45 automatic
* 26fc544 lenovo/t60: Enable native intel gfx init.
^ was being maintained in libreboot, now upstreamed so not needed
Framebuffer mode was disabled for the KGPE-D16, because only
text-mode works at the moment.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch b/resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch new file mode 100644 index 0000000..6d2c7e6 --- /dev/null +++ b/resources/libreboot/patch/kgpe-d16/0107-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch @@ -0,0 +1,66 @@ +From abac0edc90bff68cf30b60096c0db5214d8ef7f9 Mon Sep 17 00:00:00 2001 +From: Timothy Pearson <tpearson@raptorengineeringinc.com> +Date: Sat, 8 Aug 2015 22:14:59 -0500 +Subject: [PATCH 107/139] cpu/amd/family_10h-family_15h: Set up SRI to XCS + Token Count registers on Family 15h + +Change-Id: Ic992efad11d8e231ec85c793cf1e478bea0b9d3e +Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> +--- + src/cpu/amd/family_10h-family_15h/init_cpus.c | 40 +++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c +index 63ad346..115338e 100644 +--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c ++++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c +@@ -1642,6 +1642,46 @@ static void cpuSetAMDPCI(u8 node) + pci_write_config32(NODE_PCI(node, 3), (link << 2) + 0x148, dword); + } + } ++ ++ /* Set up the SRI to XCS Token Count */ ++ uint8_t free_tok; ++ uint8_t up_rsp_tok; ++ ++ /* Set defaults */ ++ free_tok = 0xa; ++ up_rsp_tok = 0x3; ++ ++ if (!dual_node) { ++ free_tok = 0xa; ++ up_rsp_tok = 0x3; ++ } else { ++ if ((sockets == 1) ++ || ((sockets == 2) && (sockets_populated == 1))) { ++ if (probe_filter_enabled) { ++ free_tok = 0x9; ++ up_rsp_tok = 0x3; ++ } else { ++ free_tok = 0xa; ++ up_rsp_tok = 0x3; ++ } ++ } else if ((sockets == 2) && (sockets_populated == 2)) { ++ free_tok = 0xb; ++ up_rsp_tok = 0x1; ++ } else if ((sockets == 4) && (sockets_populated == 2)) { ++ free_tok = 0xa; ++ up_rsp_tok = 0x3; ++ } else if ((sockets == 4) && (sockets_populated == 4)) { ++ free_tok = 0x9; ++ up_rsp_tok = 0x1; ++ } ++ } ++ ++ dword = pci_read_config32(NODE_PCI(node, 3), 0x140); ++ dword &= ~(0xf << 20); /* FreeTok = free_tok */ ++ dword |= ((free_tok & 0xf) << 20); ++ dword &= ~(0x3 << 8); /* UpRspTok = up_rsp_tok */ ++ dword |= ((up_rsp_tok & 0x3) << 8); ++ pci_write_config32(NODE_PCI(node, 3), 0x140, dword); + } + + printk(BIOS_DEBUG, " done\n"); +-- +1.9.1 + |