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| author | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 19:12:53 (EDT) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 21:32:36 (EDT) |
| commit | 0622df6194dbb1b2120743c0fd1cc5e72c380128 (patch) | |
| tree | 4c858b8c5667fe001a9907ae0578b4ec28a8f513 /resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch | |
| parent | 5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (diff) | |
| download | libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.zip libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.gz libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.bz2 | |
KGPE-D16: update patch set (also update coreboot and vboot)
Also contains other fixes from coreboot, like:
* 551cff0 Derive lvds_dual_channel from EDID timings.
^ makes single/dual channel LVDS selection on GM45 automatic
* 26fc544 lenovo/t60: Enable native intel gfx init.
^ was being maintained in libreboot, now upstreamed so not needed
Framebuffer mode was disabled for the KGPE-D16, because only
text-mode works at the moment.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch b/resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch deleted file mode 100644 index b7a888e..0000000 --- a/resources/libreboot/patch/kgpe-d16/0005-southbridge-amd-sr5650-Remove-unnecessary-register-c.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 0d0290e3866dd24c77de9114937b692bba0e9db9 Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <kb9vqf@pearsoncomputing.net> -Date: Sun, 2 Aug 2015 21:29:20 -0500 -Subject: [PATCH 005/146] southbridge/amd/sr5650: Remove unnecessary register - configuration - ---- - src/southbridge/amd/sr5650/early_setup.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c -index d91f3bd..ec555f8 100644 ---- a/src/southbridge/amd/sr5650/early_setup.c -+++ b/src/southbridge/amd/sr5650/early_setup.c -@@ -1,6 +1,7 @@ - /* - * This file is part of the coreboot project. - * -+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering - * Copyright (C) 2010 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify -@@ -437,7 +438,6 @@ static void sr5650_por_htiu_index_init(device_t nb_dev) - set_htiu_enable_bits(nb_dev, 0x1D, 0x1<<2, 0x1<<2); - set_htiu_enable_bits(nb_dev, 0x1D, 0x1<<4, 0x1<<4); - -- set_nbcfg_enable_bits(cpu_f0, 0x68, 3 << 21, 0 << 21); - axindxc_reg(0x10, 1 << 9, 1 << 9); - set_pcie_enable_bits(nb_dev, 0x10 | 5 << 16, 1 << 9, 1 << 9); - set_htiu_enable_bits(nb_dev, 0x06, 0x1<<26, 0x1<<26); --- -1.7.9.5 - |