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authorFrancis Rowe <info@gluglug.org.uk>2015-06-15 15:15:36 (EDT)
committer Francis Rowe <info@gluglug.org.uk>2015-06-15 23:36:26 (EDT)
commitbd95009839337576c1d7ac6d022228c4ec4248a5 (patch)
tree29622510346a315c5cb0fd766ac883147f3b4b15 /resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch
parent9f8eced929a99b2ad7b10d1b8d237779afdd98d5 (diff)
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Update coreboot-libre
Rebase all patches. Remove the ones that are no longer needed. More CPU microcode updates were moved to coreboot's 3rdparty repository, so there are less blobs for libreboot to delete now (because the 3rdparty repository is not checked out in libreboot). Correct HDA verbs used for T400 (also R400, T500) (patch is in coreboot, merged).
Diffstat (limited to 'resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch')
-rw-r--r--resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch63
1 files changed, 0 insertions, 63 deletions
diff --git a/resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch b/resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch
deleted file mode 100644
index f98f09e..0000000
--- a/resources/libreboot/patch/0003-northbridge-intel-gm45-gma-Minor-cleanup.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 9b8322db70364aae21f05755b62a58695ade0a82 Mon Sep 17 00:00:00 2001
-From: Timothy Pearson <tpearson@raptorengineeringinc.com>
-Date: Mon, 6 Apr 2015 21:54:56 -0500
-Subject: [PATCH 03/22] northbridge/intel/gm45/gma: Minor cleanup
-
-1.) Removed invalid set of TRANS_STATE_MASK bit
-2.) Used i915 register defines to clarify code
-
-Change-Id: I08d016e9d66b5eeea8f2174abaa35a98e2b4eca3
-Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
----
- src/northbridge/intel/gm45/gma.c | 13 +++++--------
- 1 file changed, 5 insertions(+), 8 deletions(-)
-
-diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
-index b08422a..c71b8b2 100644
---- a/src/northbridge/intel/gm45/gma.c
-+++ b/src/northbridge/intel/gm45/gma.c
-@@ -134,9 +134,9 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
- outl(physbase + (i << 12) + 1, piobase + 4);
- }
-
-- write32(mmio + 0x61100, 0x40008c18);
-+ write32(mmio + ADPA, 0x40008c18);
- write32(mmio + 0x7041c, 0x0);
-- write32(mmio + 0x6020, 0x3);
-+ write32(mmio + _DPLL_B_MD, 0x3);
-
- vga_misc_write(0x67);
-
-@@ -174,9 +174,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
-
- target_frequency = info->gfx.lvds_dual_channel ? edid.pixel_clock
- : (2 * edid.pixel_clock);
--#if !IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
-- vga_textmode_init();
--#else
-+#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
- vga_sr_write(1, 1);
- vga_sr_write(0x2, 0xf);
- vga_sr_write(0x3, 0x0);
-@@ -200,6 +198,8 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
- write32(mmio + DSPSURF(0), 0);
- for (i = 0; i < 0x100; i++)
- write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101);
-+#else
-+ vga_textmode_init();
- #endif
-
- /* Find suitable divisors. */
-@@ -391,9 +391,6 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info,
- write32(mmio + 0x000f000c, 0xb01a2050);
- mdelay(1);
- write32(mmio + TRANSCONF(0), TRANS_ENABLE | TRANS_6BPC
--#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
-- | TRANS_STATE_MASK
--#endif
- );
- write32(mmio + LVDS,
- LVDS_PORT_ENABLE
---
-1.9.1
-