New board: ThinkPad R400 support added to libreboot.

4 files changed, 220 insertions, 10 deletions

diff --git a/docs/install/images/r400/r400_pomona.jpg b/docs/install/images/r400/r400_pomona.jpg
new file mode 100644
index 0000000..32f3411
--- /dev/null
+++ b/docs/install/images/r400/r400_pomona.jpg
diff --git a/docs/install/index.html b/docs/install/index.html
index 97462fd..b544909 100644
--- a/docs/install/index.html
+++ b/docs/install/index.html
@@ -38,7 +38,7 @@
 				<li><a href="#rom">Recommended ROMs to flash</a></li>
 				<li><a href="#flashrom_lenovobios">X60/X60S/X60T/T60: How to flash your ROM (if running Lenovo BIOS firmware)</a></li>
 				<li><a href="#flashrom_macbook21">macbook21: How to flash your ROM (if running Apple EFI firmware)</a></li>
-				<li><a href="#flashrom">X60/X60S/X60T/T60/X200/macbook21: How to flash your ROM (if running libreboot or coreboot already)</a></li>
+				<li><a href="#flashrom">X60/X60S/X60T/T60/X200/R400/macbook21: How to flash your ROM (if running libreboot or coreboot already)</a></li>
 			</ul>
 
 		<h2>Installing libreboot (hardware)</h2>
@@ -47,6 +47,7 @@
 				<li><a href="x60tablet_unbrick.html">ThinkPad X60 Tablet: How to unbrick</a></li>
 				<li><a href="t60_unbrick.html">ThinkPad T60: How to unbrick</a></li>
 				<li><a href="x200_external.html">ThinkPad X200: How to unbrick</a> (also the initial installation guide for this machine)</li>
+				<li><a href="r400_external.html">ThinkPad R400: How to unbrick</a> (also the initial installation guide for this machine)</li>
 			</ul>
 			
 	</div>
@@ -77,6 +78,7 @@
 					<li>ThinkPad X60, X60s and X60 Tablet: <b>bin/x60/</b></li>
 					<li>ThinkPad T60: <b>bin/t60/</b> (note, see <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>)</li>
 					<li>ThinkPad X200: <b>bin/x200_8mb/</b> (8MiB flash chip) or <b>bin/x200_4mb</b> (4MiB flash chip) (see <a href="../hcl/x200.html">../hcl/x200.html</a>)</li>
+					<li>ThinkPad R400: <b>bin/r400_8mb/</b> (8MiB flash chip) or <b>bin/r400_4mb</b> (4MiB flash chip) (see <a href="../hcl/r400.html">../hcl/r400.html</a>)</li>
 					<li>Apple MacBook2,1: <b>bin/macbook21/</b></li>
 					<li>Apple MacBook1,1: <b>bin/macbook21/</b> (it's not a typo; the same ROMs work)</li>
 				</ul>
@@ -329,7 +331,7 @@
 
 	<div class="section">
 
-		<h1 id="flashrom">X60/X60S/X60T/T60/X200/macbook21: How to flash the ROMs onto your machine (if running libreboot or coreboot already)</h1>
+		<h1 id="flashrom">X60/X60S/X60T/T60/X200/R400/macbook21: How to flash the ROMs onto your machine (if running libreboot or coreboot already)</h1>
 
 			<p>
 				<b>
@@ -353,6 +355,11 @@
 			</p>
 			<p>
 				<b>
+					If you have Lenovo BIOS running (R400), go to <a href="r400_external.html">r400_external.html</a> instead.
+				</b>
+			</p>
+			<p>
+				<b>
 					If you have Apple EFI firmware running (macbook21), go to <a href="#flashrom_macbook21">#flashrom_macbook21</a> instead.
 				</b>
 			</p>
@@ -363,16 +370,17 @@
 			</p>
 			<p>
 				<b>
-					If you have an X200 with libreboot or coreboot already running, note that
+					If you have an X200 or R400 with libreboot or coreboot already running, note that
 					the Gbe in the boot flash contains your MAC address. You will need to change the default
 					MAC address inside the ROM images before flashing a new libreboot image. See 
-					<a href="../hcl/x200_remove_me.html#ich9gen">ich9gen</a> for details.
+					<a href="../hcl/gm45_remove_me.html#ich9gen">ich9gen</a> for details.
 					
-					Another important note about the X200: even if you do already have libreboot or coreboot,
+					Another important note about the X200/R400: even if you do already have libreboot or coreboot,
 					it is possible for the user to write-protect regions in the flash chip, by modifying
 					the flash descriptor. If you have locked regions, you will need an external flasher
-					(see <a href="x200_external.html">x200_external.html</a>) to re-flash those regions. By default,
-					the X200 ROM images in libreboot contain a descriptor+gbe with all regions unlocked.
+					(see <a href="x200_external.html">x200_external.html</a> or <a href="x200_external.html">x200_external.html</a>)
+					to re-flash those regions. By default,
+					the X200 and R400 ROM images in libreboot contain a descriptor+gbe with all regions unlocked.
 				</b>
 			</p>
 			<p>
diff --git a/docs/install/r400_external.html b/docs/install/r400_external.html
new file mode 100644
index 0000000..ad6e4bd
--- /dev/null
+++ b/docs/install/r400_external.html
@@ -0,0 +1,202 @@
+<!DOCTYPE html>
+<html>
+<head>
+	<meta charset="utf-8">
+	<meta name="viewport" content="width=device-width, initial-scale=1">
+
+	<style type="text/css">
+		@import url('../css/main.css');
+	</style>
+
+	<title>ThinkPad R400: flashing tutorial (BeagleBone Black)</title>
+</head>
+
+<body>
+
+	<div class="section">
+		<h1 id="pagetop">Flashing the R400 with a BeagleBone Black</h1>
+			<p>Initial flashing instructions for X200.</p>
+			<p>
+				This guide is for those who want libreboot on their ThinkPad R400
+				while they still have the original Lenovo BIOS present. This guide
+				can also be followed (adapted) if you brick your R400, to know how
+				to recover.
+			</p>
+			<p>
+				Before following this section, please make sure to setup your libreboot ROM properly first. 
+				Although ROM images are provided pre-built in libreboot, there are some modifications that 
+				you need to make to the one you chose before flashing. (instructions referenced later in
+				this guide)
+			</p>
+
+			<p><a href="index.html">Back to main index</a></p>
+	</div>
+
+	<div class="section">
+
+		<h1 id="flashchips">Flash chips</h1>
+		
+			<p>
+				There are two possible flash chip sizes for the R400: 4MiB
+				(32Mbit) or 8MiB (64Mbit). This can be identified by the type
+				of flash chip below the palmrest: 4MiB is SOIC-8 (8 pins), 8MiB
+				is SOIC-16 (16 pins). The X200S uses a WSON package and has the same
+				pinout as SOIC-8 (covered briefly later on in this guide) but
+				the chip is on the underside of the board (disassembly required).
+			</p>
+		
+			<p>
+				<a href="#pagetop">Back to top of page.</a>
+			</p>
+			
+	</div>
+		
+	<div class="section">
+
+		<h1>Initial BBB setup</h1>
+		
+			<p>
+				Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to
+				setup the BBB for flashing.
+			</p>
+
+			<p>
+				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-16 (clip: Pomona 5252):
+			</p>
+<pre>
+POMONA 5252 (correlate with the BBB guide)
+===  ethernet jack and VGA port ====
+ NC              -       - 21
+ 1               -       - 17
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ NC              -       - NC
+ 18              -       - 3.3V PSU RED
+ 22              -       - NC - this is pin 1 on the flash chip
+===  SATA port ===
+<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
+</pre>
+			<p>
+				The following shows how to connect clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):
+			</p>
+<pre>
+POMONA 5250 (correlate with the BBB guide)
+===  RAM slots ====
+ 18              -       - 1
+ 22              -       - NC
+ NC              -       - 21
+ 3.3V PSU RED    -       - 17 - this is pin 1 on the flash chip. in front of it is the screen.
+===  slot where the AC jack is connected ===
+</pre>
+
+			<h2>
+				Connect Pomona 5252/5250 to the R400 flash chip, and dump/flash
+			</h2>
+				<p>
+					<a href="images/r400/r400_pomona.jpg">images/r400/r400_pomona.jpg</a>
+					shows everything connected. In this picture, the R400 is being flashed
+					with the BBB.
+				</p>
+				<p>
+					No disassembly instructions yet, unfortunately. Check videos online or
+					look at the Hardware Maintenance Manual from Lenovo for this machine.
+					You will need to completely disassemble the machine, removing the motherboard
+					from its metal shell.
+					Connect your 5252/5250 (make sure to get it the right way round). 
+					Then connect the 3.3v PSU wire (red one) and make sure that everything else is connected.
+				</p>
+				<p>
+					I did (SSH'd into the BBB):<br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/>
+					In my case, the output was:
+				</p>
+<pre>
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip &quot;MX25L6405(D)&quot; (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip &quot;MX25L6406E/MX25L6436E&quot; (8192 kB, SPI) on linux_spi.
+Found Macronix flash chip &quot;MX25L6445E/MX25L6473E&quot; (8192 kB, SPI) on linux_spi.
+Multiple flash chip definitions match the detected chip(s): &quot;MX25L6405(D)&quot;, &quot;MX25L6406E/MX25L6436E&quot;, &quot;MX25L6445E/MX25L6473E&quot;
+Please specify which chip definition to use with the -c &lt;chipname&gt; option.
+</pre>
+				<p>
+					This is just to test that it's working. In my case, I had to define which chip to use, like so (in your case
+					it may be different, depending on what flash chip you have):<br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c &quot;MX25L6405(D)&quot;</b>
+				</p>
+				<p>
+					At this point, you need to create a copy of the original lenovo firmware that is currently flashed. 
+					This is so that you can extract the gbe (gigabit ethernet) and flash descriptor regions for use in libreboot. <b>These
+					are not blobs, they only contain non-functional data (configuration details, fully readable) which is fully documented in public datasheets.</b>
+					The descriptor will need to be modified
+					to disable the ME (also disable AMT) so that you can flash a ROM that excludes it. 
+				</p>
+				<p>
+					How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c &quot;MX25L6405(D)&quot; -r factory.rom</b><br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c &quot;MX25L6405(D)&quot; -r factory1.rom</b><br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c &quot;MX25L6405(D)&quot; -r factory2.rom</b><br/>
+					Now compare the 3 images:<br/>
+					# <b>sha512sum factory*.rom</b><br/>
+					If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another machine, not
+					the BBB). You will need it later for part of the deblobbing.
+				</p>
+				<p>
+					Information about the descriptor, gbe regions and how the ME was removed can be found in the notes linked at
+					<a href="../hcl/gm45_remove_me.html">../hcl/gm45_remove_me.html</a>. Libreboot ROM images now include
+					the 12KiB descriptor+gbe by default, generated using ich9gen;
+					<b>however, do note that the MAC address in the Gbe region is generic. Follow the instructions at 
+					<a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> and do what it says to change the MAC address
+					inside your R400 ROM image, before flashing it.</b>
+				</p>
+				<p>
+					Assuming that your libreboot ROM image is properly setup (modified descriptor plus gbe region included in the ROM),
+					then you can flash (assuming that the filename is <b>libreboot.rom</b>) for example I had to do:<br/>
+					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -c &quot;MX25L6405(D)&quot; -w libreboot.rom</b>
+				</p>
+				<p>
+					You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot.
+					Test it! (boot your R400)
+				</p>
+				<p>
+					My output when running the command above:
+				</p>
+<pre>
+flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
+flashrom is free software, get the source code at http://www.flashrom.org
+Calibrating delay loop... OK.
+Found Macronix flash chip &quot;MX25L6405(D)&quot; (8192 kB, SPI) on linux_spi.
+Reading old flash chip contents... done.
+Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Erase/write done.
+Verifying flash... VERIFIED.
+</pre>
+				
+			<p>
+				<a href="#pagetop">Back to top of page.</a>
+			</p>
+			
+	</div>
+
+	<div class="section">
+
+		<p>
+			Copyright &copy; 2014, 2015 Francis Rowe &lt;info@gluglug.org.uk&gt;<br/>
+			This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions.
+			A copy of the license can be found at <a href="../license.txt">../license.txt</a>.
+		</p>
+
+		<p>
+			This document is distributed in the hope that it will be useful,
+			but WITHOUT ANY WARRANTY; without even the implied warranty of
+			MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information.
+		</p>
+		
+	</div>
+
+</body>
+</html>
diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html
index e353e24..d4f1a91 100644
--- a/docs/install/x200_external.html
+++ b/docs/install/x200_external.html
@@ -108,7 +108,7 @@ chip on those pins?
 				connected to a BBB.</b>
 				<br/>
 				In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead.
-				Check the list of SOIC-8 flash chips at <a href="../hcl/x200_remove_me.html#flashchips">../hcl/x200_remove_me.html#flashchips</a> but
+				Check the list of SOIC-8 flash chips at <a href="../hcl/gm45_remove_me.html#flashchips">../hcl/gm45_remove_me.html#flashchips</a> but
 				do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case,
 				the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.
 			</p>
@@ -167,10 +167,10 @@ Please specify which chip definition to use with the -c &lt;chipname&gt; option.
 				</p>
 				<p>
 					Information about the descriptor, gbe regions and how the ME was removed can be found in the notes linked at
-					<a href="../hcl/x200_remove_me.html">../hcl/x200_remove_me.html</a>. Libreboot ROM images now include
+					<a href="../hcl/gm45_remove_me.html">../hcl/gm45_remove_me.html</a>. Libreboot ROM images now include
 					the 12KiB descriptor+gbe by default, generated using ich9gen;
 					<b>however, do note that the MAC address in the Gbe region is generic. Follow the instructions at 
-					<a href="../hcl/x200_remove_me.html#ich9gen">../hcl/x200_remove_me.html#ich9gen</a> and do what it says to change the MAC address
+					<a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a> and do what it says to change the MAC address
 					inside your X200 ROM image, before flashing it.</b>
 				</p>
 				<p>