summaryrefslogtreecommitdiffstats
path: root/docs/install
diff options
context:
space:
mode:
authorFrancis Rowe <info@gluglug.org.uk>2015-02-11 00:49:08 (EST)
committer Francis Rowe <info@gluglug.org.uk>2015-02-11 00:49:08 (EST)
commit3b93b0ffd99d0f4e85067da28b62e118a16e35c6 (patch)
tree2b779d240038d88e1b4b9be99919d13f971e3be3 /docs/install
parent6ce40ce6a0e7aeaa26ded09ac8084362723b869b (diff)
downloadlibreboot-3b93b0ffd99d0f4e85067da28b62e118a16e35c6.zip
libreboot-3b93b0ffd99d0f4e85067da28b62e118a16e35c6.tar.gz
libreboot-3b93b0ffd99d0f4e85067da28b62e118a16e35c6.tar.bz2
docs/install/x200_external: Mention GPIO33 non-descriptor mode
Diffstat (limited to 'docs/install')
-rw-r--r--docs/install/x200_external.html3
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html
index d4f1a91..e0f2179 100644
--- a/docs/install/x200_external.html
+++ b/docs/install/x200_external.html
@@ -111,6 +111,9 @@ chip on those pins?
Check the list of SOIC-8 flash chips at <a href="../hcl/gm45_remove_me.html#flashchips">../hcl/gm45_remove_me.html#flashchips</a> but
do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case,
the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.
+ <br/>
+ Another possible solution: ground GPIO33 and boot up in non-descriptor mode. This might make software flashing possible, if
+ it's possible to circumvent any flashing protections that might exist.
</p>
<h2>