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authorFrancis Rowe <info@gluglug.org.uk>2015-02-07 21:55:24 (EST)
committer Francis Rowe <info@gluglug.org.uk>2015-02-07 21:55:24 (EST)
commit068b8f582296224591200104ab6f92fac537078e (patch)
tree773c23010e54d2020f9dee9c2ecc694e32128992 /docs/install
parent32014c2b2f10a02bdd801c6db9cfe10ca6fe7733 (diff)
downloadlibreboot-068b8f582296224591200104ab6f92fac537078e.zip
libreboot-068b8f582296224591200104ab6f92fac537078e.tar.gz
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various fixes for r20150208
Diffstat (limited to 'docs/install')
-rw-r--r--docs/install/images/x200/soic8.jpgbin0 -> 158293 bytes
-rw-r--r--docs/install/index.html8
-rw-r--r--docs/install/x200_external.html7
3 files changed, 12 insertions, 3 deletions
diff --git a/docs/install/images/x200/soic8.jpg b/docs/install/images/x200/soic8.jpg
new file mode 100644
index 0000000..ad0b2fb
--- /dev/null
+++ b/docs/install/images/x200/soic8.jpg
Binary files differ
diff --git a/docs/install/index.html b/docs/install/index.html
index 60d9a73..97462fd 100644
--- a/docs/install/index.html
+++ b/docs/install/index.html
@@ -394,9 +394,11 @@
<b>$ sudo ./flash bin/<a href="#rom">YOURBOARD/YOURROM</a></b>
</p>
<p>
- If you are flashing a ThinkPad X60 that is currently running libreboot 5th release or lower
- (anything on or before June 22nd 2014), then use this to upgrade:<br/>
- <b>$ sudo ./x60flashfrom5 bin/<a href="#rom">YOURBOARD/YOURROM</a></b>
+ If you are sure that you are flashing the correct image but you get the error
+ <b>This coreboot image (LENOVO:ThinkPad X60) does not appear to be correct for the detected mainboard (Lenovo:ThinkPad X60 / X60s / X60t) or
+ similar (if it's a different board), then do</b>:
+ <br/>
+ <b>$ sudo ./forceflash bin/<a href="#rom">YOURBOARD/YOURROM</a></b>
</p>
<div class="important">
diff --git a/docs/install/x200_external.html b/docs/install/x200_external.html
index f990789..6922b90 100644
--- a/docs/install/x200_external.html
+++ b/docs/install/x200_external.html
@@ -94,6 +94,8 @@ POMONA 5250 (correlate with the BBB guide)
3.3V PSU RED - - 17 - this is pin 1 on the flash chip. in front of it is the screen.
=== right side of the X200 (where the audio jacks are) ===
<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
+Here is a photo of the SOIC-8 flash chip: <a href="images/x200/soic8.jpg" alt="freenode IRC #libreboot 01:42 UK/London timezone February 8th 2015: pehjota: fchmmr: Here are two photos in the camera's configured resolution; resize them as you wish: http://www.pehjota.net/~pj/x200/soic-8/. License: CC BY-SA 3.0 or later. If you want other angles or anything, let me know.">images/x200/soic8.jpg</a>
+(image copyright 2015 Patrick P.J. McDermott &lt;pj@pehjota.net&gt;, CC BY-SA 3.0 or later)
</pre>
<p>
<b>On the X200S the flash chip is underneath the board, in a WSON package.
@@ -101,6 +103,11 @@ POMONA 5250 (correlate with the BBB guide)
<a href="images/x200/wson_soldered.jpg">images/x200/wson_soldered.jpg</a> (image copyright (C) 2014 <a href="mailto:sgsit@libreboot.org">Steve Shenton</a> under CC-BY-SA 4.0
or higher, same license that this document uses) shows it wired (soldered) and
connected to a BBB.</b>
+ <br/>
+ In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead.
+ Check the list of SOIC-8 flash chips at <a href="../hcl/x200_remove_me.html#flashchips">../hcl/x200_remove_me.html#flashchips</a> but
+ do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-8. For 8MiB capacity in this case,
+ the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.
</p>
<h2>